An Investigation into Applicability of Distributed FPGAs to High‐Performance Computing
John P. Morrison, Padraig J. O'Dowd, Philip D. Healy · 2005
This chapter contains sections titled: Introduction High Performance Computing with Cluster Computing Reconfigurable Computing with EPGAs DRMC: A Distributed Reconfigurable Metacomputer Application Development Metacomputer Overview Hardware Setup Operation Programming the RC1000 board Algorithm Suited To The Implementation on FPGAS/DRMC Algorithm Not Suited To The Implementation on FPGAS/DRMC Summary Reference This chapter discusses the experiences and lessons learned from applying Reconfigurable Computing (FPGAs) to High Performance Computing. Here Reconfigurable Computing is defined as using the re-programmable aspect of FPGAs to implement different algorithms directly in hardware. The history of Reconfigurable Computing with FPGAs is summarized and various types of architectures used in Reconfigurable Systems are reviewed. The Distributed Reconfigurable Meta-Computer project (DRMC) is presented, the goal of which is to apply distributed FPGA acceleration to High Performance Computing applications, by adding Reconfigurable Computing boards to standard desktop machines in a Beowulf cluster. Some example applications are then outlined. The first is an example of a type of application that benefits from implementation on an FPGA cluster, whereas the second illustrates that not all applications fall into this category. Finally some speculative thoughts on the future of FPGAs in High Performance Computing are offered.