Rapidly reconfigurable coarse-grained FPGA architecture for digital filtering applications
Shu-Shin Chin, Wei Wu, Sangjin Hong · 2003
This paper presents a rapid reconfigurable coarse-grained FPGA architecture targeted for FIR filter, LMS adaptive FIR filters with multiple correlation and FFT/IFFT for digital filtering applications. The proposed architecture can configure up to four pipelined radix-4 or radix-2 2048 point FFT/IFFT, two 32-tap LMS filters or two 64-tap multiple FIR filters. By reducing unnecessary switching of general purpose routing resources, used extensively in fine-grained FPGAs, our approach can achieve the flexibility of a fine-grained FPGA with the performance and area efficiency similar to that of an ASIC.