A 133 MHz 170 mW 10 μA standby application processor for 3G cellular phones
Takazo Yamada, Nobuyuki Irie, J. Nishimoto, Yuki Kondoh, T. Nakazawa, Kazuyoshi Yamada, Ken Tatezawa, Takahiro Irita, S. Tamaki, H. Yagi, Masayuki Furuyama, Kenji Ogura, Hikaru Watanabe, R. Satomura, Kenzo Hirose, F. Arakawa, Toshihiro Hattori, Isao Kudo, Ikuya Kawasaki, Kota Uchiyama · 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2003
An application processor for 3G cellular phones, using 0.18 /spl mu/m CMOS technology, includes a single CPU and DSP core with an on-chip 128 kB SRAM. It enables software-based 15 frames/s MPEG-4 encoding of QCIF Simple @L1 at 70 MHz and 140 mW. Standby current of the processor is <10 /spl mu/A in a partially powered standby mode using separate power lines.