Verification of a DSP IP cores by model checking
Hoang Nga Nguyen, P. Koumou, B. Candaele, Michel Sarlotte, Christian Antoine, S. Emeriau · 2003
This paper describes an experience in applying formal techniques to the verification of the IP cores composing a DSP. We discuss the application methods and highlight the complementary aspect with traditional simulation. The paper concludes with comments on the results and a discussion on further improvements of the methods elaborated in this experience.