Case study: Re-visiting SoC verification challenges and best practices
Prokash Ghosh, Sandip Ghosh, Pritpal Singh, Saurabh Mishra · 2015
The size and complexity of system-on-chip (SoC) design is growing rapidly as more and more IPs/features/functions are put into single die to reduce overall system development cost. It significantly increases SoC verification challenges in recent time due to high degree of integration of complex IPs. In this paper we will be discussing different verification strategies in different areas of verification and some of the best practices that we have followed in our SoCs. We have applied all these verification methodologies and productivity measures on top of existing conventional methodologies in our SoC T1024 [1] and the result is remarkable. We achieved first pass silicon [1] and it reduced post silicon cycles significantly. As a result the organization has pulled in the final production qualification cycle by almost three months. These methodologies also became huge success for our previous product C293[2].