30MHz compiled chip set for graphics computations
Sharbel E. Noujaim, Richard I. Hartley, H. E. Cline, R.T. Jerdonek, Siegwalt Ludke · 1987
A 1.25μm CMOS chip that has attained a device density of 1500 transistors/mm2, using a silicon compiler for design, will be described. The bit-slice elements of the chip communicate serially to implement a pipeline with a throughput of 50 million multiply/accumulates/s at a 30MHz clock rate.