VLSI implementation of a neural network memory with several hundreds of neurons
Hans Peter Graf, L. D. Jackel, Richard E. Howard, B. L. Straughn, John S. Denker, W. Hubbard, D. M. Tennant, Daniel Ethan Schwartz · AIP conference proceedings · 1986
We designed an Electronic Neural Network (ENN) memory with 256 neurons on a single chip using a combination of analog and digital VLSI technology plus a custom microfabrication process. Amplifiers with inverting and noninverting outputs are used for the neurons to make inhibitory and excitatory connections. The connections between the individual neurons are provided by amorphous‐silicon resistors which are placed on the CMOS chip in the last fabrication step. This technique allows a very dense packing of the neurons. Electron‐beam direct‐writing is used to pattern the resistors making it easy to change the information stored in the network from one chip to the next.