An area-efficient systolic division circuit over GF(2/sup m/) for secure communication
Chien-Hsing Wu, Chien‐Ming Wu, Ming‐Der Shieh, Yin‐Tsung Hwang · 2003
We present a novel area-efficient parallel-in parallel-out systolic division circuit (v = a/b) over GF(2/sup m/) based on the extended Stein's algorithm. By keeping the combined area-time (AT) complexity at the lowest level of O(m/sup 2/), we evenly distribute the complexity of O(m) in area and time, and design a well-balanced division circuit capable of operating at high speed with high area efficiency. Compared to the other systolic architectures, our design exhibits significant advantages in both area and time.