A differential built-in current sensor design for high speed IDDQ testing
J.P. Hurst, A.D. Singh · 2002
A new built-in current sensor design for IDDQ testing is presented in this paper. Our design overcomes performance limitations encountered by previous sensors by using a novel differential architecture which allows early and accurate detection of abnormal quiescent current following the switching transient. A test circuit utilizing the sensor in a built-in self-test environment has been fabricated through MOSIS 2.0-micron n-well technology. At clock speeds of up to 31.65 MHz the sensor accurately detects all six of the defects that were implanted in the test chip.