A hardware/software cosynthesis system for digital signal processor cores with two types of register files
Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki · 2000
This paper proposes a hardware/software cosynthesis system fordigital signal processor cores with two types of registerfilis Given anappl9/1878 program and its data, the system synthesizes a hardware description of a processor core, an object code running on the processor core, and software environments. A synthesized processor core can be composed of a processor kernel mul7HH7 data memory buses, hardwarel op units, addressing units, and mulCLLN functional units. Furthermore it can have two types of registerfili