SPECIAL : a Specification Language for Generation of VHDL Behavioral Descriptions
N. Valverde, Anne-Lise Courbis, Jean-François Santucci, A. Rucinski · 2005
In Existing Cad Methodologies The Linkage Between The Microelectronic System Specification Arsd Vhdl Design Tools Is Not Yet Clearly Defined. The Presence Of A Design Environment Which Would Estiminate This Deficiency Will Substantially Shorten The Design Development Cycle As Well As Enhance Its Reusability Aspect. The Described Design Specification Language, Special, Allows A Designer To Represent The Initial Stage Of A Microelectronic System In A Graphical Form. The Corresponding Vhdl Behavioral Description Is Then Automatically Generated. The Concept Of This Design Methodology Is Unique In Two Aspects: (i) The Timing Considerations Are Fully Integrated, And (ii) The Custom-specific Design Habits Are Easy To Incorporate And Modify.