Design of permuted Serially Concatenated Multiple Parity-Check codes
Marco Baldi, Giovanni Cancellieri, Franco Chiaraluce, Amedeo De Amicis · Università Politecnica delle Marche (Università Politecnica delle Marche) · 2010
This paper elaborates on the design of Multiple Serially Concatenated Multiple Parity-Check (M-SC-MPC) codes, that are a class of structured Low-Density Parity-Check (LDPC) codes recently proposed by the authors. M-SC-MPC codes are obtained as the serial concatenation of simple component codes, and their associated Tanner graph can be free of short length cycles. In this paper, we adopt a modified version of the Progressive Edge Growth (PEG) algorithm to improve the design of M-SC-MPC codes in terms of local cycles length. The proposed codes can be seen as M-SC-MPC codes where an interleaver is added between each pair of component codes; so we denote them as Permuted Serially Concatenated Multiple Parity-Check (P-SC-MPC) codes. We assess their performance through numerical simulations and compare them with previous solutions. We show that the proposed codes perform comparably or even better than both regular and irregular MSC-MPC codes and Quasi-Cyclic (QC) codes included in the IEEE 802.16e standard.