Development in Verification of Design Correctness
Wendell E. Cory, W. M. vanCleemput · Design Automation Conference · 1980
This paper reviews recent developments in the verification of digital systems designs. The emphasis is on proof of functional correctness. Some of the techniques reviewed are symbolic simulation (including parallel simulation of HDL descriptions), dataflow verfication by grammar construction, comparison of manually generated design with automated design, and functional abstraction.