A comparison of architectures for a programmable fuzzy logic chip
T. Lund, A. Torralba, R.G. Carvajal, Jaime Ramirez‐Angulo · 2003
Three possible architectures for a programmable fuzzy logic chip are proposed and examined in terms of their implications for implementation. The capabilities of each architecture in terms of number of inputs and outputs usable, and the number of membership functions available for each of these, the size of the possible rule base, and the versatility and programmability of the design, are weighed against the chip area required, the likely power consumption, and the accuracy and throughput.