A 16-issue multiple-program-counter microprocessor with point-to-point scalar operand network

Michael Bedford Taylor, J. Kim, Joel B. Miller, David Wentzlaff, Fae Ghodrat, Bruce C. N. Greenwald, Henry Hoffman, P. V. Johnson, W. Lee, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Saman P. Amarasinghe, Anant K. Agarwal · 2003

This microprocessor explores an architectural solution to scalability problems in scalar operand networks. The 0.15/spl mu/m 6M process, 331 mm/sup 2/ research prototype issues 16 unique instructions per cycle and uses an on-chip point-to-point scalar operand network to transfer operands among distributed functional units.

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