9×9 DPCNN board: A multichip approach to CNN implementation
Mário Sérgio Salerno, F. Sargeni, Vincenzo Bonaiuto · 2002
Among artificial neural network architectures, the Cellular Neural Networks represent one of the most attractive from a VLSI point of view. The 3/spl times/3 DPCNN chip, formerly presented by the authors, is a very effective implementation of CNN's. This paper presents a multichip 9/spl times/9 CNN board which is made up of nine 3/spl times/3 DPCNN chips. The board is fully programmable by a Personal Computer which enables the selection of the parameters of the network and the steady-state voltages acquisition. The system PC/9/spl times/9CNN board represents a very powerful tool in the investigation of new CNN algorithms as well as their dynamic behaviours.