Fault Tolerant Computing Research.
Dhiraj K. Pradhan · 1983
During this reporting period, three main topics were investigated: (1) Design of fault tolerant computers using read-only memories as basic building blocks; (2) Design of programmable logic arrays and sequential networks for testability; and (3) Design of fault tolerant multiprocessor network architectures. Some titles of the resulting papers are: Sequential network design using extra inputs for fault detection; A class of unidirectional error correcting codes; A uniform representation of permutation networks used in memory processor interconnections; and A fault tolerant communication architecture for distributed systems.