Complex DSP Core Design for FPGA
Roger Woods, John J. McAllister, Dr Gaye Lightbody MEng in Electrical, PhD, Ying Yi · 2008
This chapter contains sections titled: Motivation for Design for Reuse Intellectual Property (IP) Cores Evolution of IP Cores Parameterizable (Soft) IP Cores IP Core Integration ADPCM IP Core Example Current FPGA-based IP Cores Summary References