SPUR: A VLSI Multiprocessor Workstation
Mark D. Hill, Susan J. Eggers, James R. Larus, George S. Taylor, Glenn D. Adams, Bidyut Kumar Bose, Garth A. Gibson, Paul M Hansen, J. S. Keller, Shing I. Kong, Corinna G Lee, Daebum Lee, Joan M. Pendleton, Scott A Ritchie, David Alvra Wood, Benjamin G. Zorn, Paul N. Hilfinger, David A. Hodges, Randy Howard Katz, John K. Ousterhout · UC Berkeley · 1985
SPUR (Symbolic Processing Using RISCs) is a workstation for conducting parallel processing research. SPUR contains 6 to 12 high-performance homogeneous processors connected with a shared bus. The number of processors is large enough to permit parallel processing experiments, but small enough to allow packaging as a personal workstation. The restricted processor count also allows us to build powerful RISC processors, which include support for Lisp and IEEE floating-point, at reasonable cost. This paper presents a specification of SPUR and the results of some early architectural experiments. SPUR features include a large virtually-tagged cache, address translation without a translation buffer, LISP support with datatype tags but without microcode, multiple cache consistency in hardware, and an IEEE floating-point coprocessor without microcode