A hierarchy of physical design watermarking schemes for intellectual property protection of IC designs
Rexford D. Newbould, Jo Dale Carothers, J.J. Rodriguez, W. Timothy Holman · 2003
A method is presented for embedding the same watermark multiple times into a single integrated circuit design using a hierarchy of incorporation techniques. This has the advantage of adding multiple independent signatures to the circuit in order to better resist large-scale attacks. A high degree of robustness is provided by requiring attacks on multiple stages of the VLSI design flow in order to properly efface the mark.