Active Fault-Tolerance Low Power Multiplier with OpenRISC Platform
Han-Sam Jung, Joo-Yul Park, Ki-Seok Chung · Journal of Communication and Computer · 2010
Today's embedded systems are commonly required to be light, small, and power-efficient. However, applications for embedded systems tend to become heavier because they often handle a huge amount of data such as multimedia contents. Therefore, employing multiple DSPs (digital signal processors) in an embedded platform is getting common. Furthermore, the complexity of the DSPs is rapidly growing to meet the requirement for high processing rates. As the complexity of DSPs grows fast, it is likely that DSPs may contain some faults. Therefore, designing fault-tolerant DSPs will be highly desirable. However, fault-tolerant designs are costly in terms of area and power consumption. Thus, in this paper, we propose an area and power efficient fault-tolerant DSP design which is based on a low power constant multiplier. The proposed design is implemented as a functional unit of an OpenRISC processor, and the fun functionality is verified by running a set of benchmark applications on a platform based on the OpenRISC.