Post processing for checking sequences
Semen Cirit · Sabanci University · 2011
There are several methods to generate a checking sequence (CS) from a given Finite State Machine M. These methods generate a CS in such a way that when the CS is traced on M, every node visited during this trace is recognized as some state of M and every transition of M is traversed. When the recognitions of the nodes in this trace are analyzed, it is observed that some of the nodes are recognized multiple times redundantly. This observation raises the following question: Is it possible to reduce the length of a given CS by eliminating redundant recognitions? In this thesis we focus on this question. We formalize the recognitions, detect multiple redundant recognitions and suggest a way to eliminate them to reduce the length of a given CS. An experimental study of our approach is also presented.