Field Programmable Gate Arrays
Donald G. Bailey · 2011
In this chapter, the basic architectural features of Field Programmable Gate Arrays (FPGAs) are examined. While a detailed understanding of the internal architecture of an FPGA is not essential to programme them (the vendor-specific place and route tools manage most of these details), a basic knowledge of the internal structure and how a design maps onto that architecture can be used to develop a more efficient implementation. Logical parallelism within an image processing operation is well suited to FPGA implementation, and it is here where many image processing algorithms may be accelerated significantly. Since an FPGA implements the logic required by an application by building separate hardware for each function, FPGAs are inherently parallel. The particular characteristics of devices from several manufacturers are considered in more detail. Many FPGA manufacturers also sell development boards or evaluation boards. Controlled Vocabulary Terms field programmable gate arrays; image processing