A 1024 Pin Universal Interconnect Array With Routing Architecture
Rongbin Guo, Hung N. Nguyen, A. D. Srinivasan, H. Verheyen, Hong Cai, S.M.L. Law, A.M. Mohsen · 1992
A re-programmable , universal interconnect array, with 1024 pins and over 1 million transistors is fabricated with 0.8~ triplemetal CMOS technology. Unlike the conventional cross-point switches based on decoding/multiplexing architecture, this chip utilizes a routing architecture which allows an order of magnitude higher pin connectivity with random connections of any number of pins to any other pin. Paths are passive and bidirectional with typical pin-to- piadelay of less than 7NS. This chip also supports optional battery backup.