A flexible gate array RAM compiler with full design tool integration
R.L. Steinweg, M. Zampaglione, P. Lin · 2002
Describes a RAM compiler for gate arrays that is well-integrated into the user design tools. The compiler supports variable aspect ratio, with high-level specification, for flexibility in floorplanning. The various hardware and software features and implementation of the compiler are described, with emphasis on the variable aspect ratio. The user design flow is also described, to show how the compiler fits into the design tools.>