Evolution of an effective DFT/ATG solution for sequential ASICs
Ralph Marlett · 2003
The author traces the evolution of a sequential circuit automatic test generator. He discusses a method for user control of the automation and shows how this leads to an elegant solution to automating design for testability. Results are presented for using the resulting system, Intelligen, for several benchmark circuits. After 11 iterations, 98% coverage was achieved. This is about the same coverage achieved previously using full scan, but Intelligen provided a savings of about 11% of the die area compared to a full scan.>