Register allocation sensitive region scheduling
Cindy Norris, Lori Pollock · 1995
Because of the interdependences between instruction scheduling and register allocation, it is not clear which of these two phases should run first. In this paper, we describe how we modified a global instruction scheduling technique to make it cooperate with a subsequent register allocation phase. In particular, our cooperative global instruction scheduler performs region scheduling transformations on the program dependence graph representation of a program while attempting to prevent an increase in the amount of spill code which will be introduced in the subsequent register allocation phase. Our experimental findings indicate that the cooperative technique does indeed produce more efficient code than noncooperative global instruction scheduling in programs in which an allocation can not be performed without the insertion of spill code. 1 Introduction In order to effectively exploit the finegrained parallelism in pipelined, superscalar and VLIW machines, various strategies for careful...