Coverage of transistor-level and gate-level stuck-at-faults in CMOS checkers
Peter Lidén, P. Dahlgren · 2002
Transistor gate stuck-at and node stuck-at faults in self-testing checkers of various implementations are examined. Two types of CMOS implementations with different transistor driving strength ratios are considered. The coverage obtained for the classic gate-level stuck-at fault model for different test set sizes is compared with the corresponding coverage of transistor-level faults. It is shown that the coverage estimation using the gate-level stuck-at model is overly optimistic.