Low power direct digital frequency synthesizers in 0.18 μm CMOS
J. M. Pierre Langlois, D. Al-Khalili · 2004
Two low-power sine-output direct digital frequency synthesizers have been fabricated in 0.18 /spl mu/m CMOS, tested and characterized. The first IC has a 16-bit phase accumulator and it generates a single phase sinusoidal digital sequence with 60 dBc of spurious free dynamic range. Core power consumption is as low as 15 /spl mu/W/MHz. The second IC has a 32-bit phase accumulator and it generates quadrature sinusoidal digital sequences with 84 dBc of spurious free dynamic range. Its core consumes as little as 220 /spl mu/W/MHz. Both ICs employ an efficient linear interpolation scheme for sinusoidal functions, developed by the authors.