A VLSI BAM neural network chip for pattern recognition applications
S. M. Rezaul Hasan, Ng Kang Siong · 2002
Bi-directional associative memory (BAM) is a two-level nonlinear neural network suitable for pattern recognition applications. One important performance attribute of the discrete BAM is its ability to recall stored pattern pairs, particularly in the presence of noise. In this paper the VLSI implementation of BAM is presented. A modular VLSI processor chip implementing BAM was designed. By using 2 micron CMOS technology, 4 neurons with 8 modules of 256/spl times/5 bit local weight-storage memory were integrated on a 6.9/spl times/7.4 mm/sup 2/ die. With 4 operating modes (learn, evaluate, read and write), it is suitable to serve as a co-processor. The system architecture is highly flexible and modular, enabling the construction of larger BAM networks of up to 252 neurons using multiple BAM chips. Results show that real-time speeds can be achieved. The total training time for a full network of up to 252 neurons is 1.5997 ms at a clock-rate of 10 MHz, which is fast enough for numerous pattern recognition applications.