A new implementation of the discrete cosine transform in the residue number system

P. García‐Fernández, Antonio García, Javier Ramı́rez, Luis Parrilla, A. Lloris · 2003

A field-programmable logic (FPL) implementation of a discrete cosine transform (DCT) based on the residue number system (RNS) is presented. Compared with a binary distributed arithmetic implementation, the presented architecture provides approximately 21% throughput improvement. Moreover, the performance improvement over a conventional binary implementation is up to 103%. This is achieved due to the synergy between RNS and modern FPL device families.

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