Communications protocols and mechanisms for distributed digital systems

Anthony C. Davies · 2004

Abstract: Synchronous clocking has continued to be the dominant digital design method despite the problems of clock distribution in integrated circuit chips of increasing complexity and speed. The continuing increases will soon force a change to asynchronous design methods, and the communication between large numbers of high-performance processors on a single chip will become a critical issue. An introduction to a classification scheme of mechanisms for interprocess communications via shared memory is described in the paper.

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