Symbolic functional test generation with guaranteed low-level fault detection
Mark C. Hansen · Deep Blue (University of Michigan) · 1996
A high-level (functional) fault modeling and test generation philosophy is proposed which is aimed at ensuring full detection of low-level, physical faults, as well as the industry-standard single stuck-line (SSL) faults. Prior work in this area either imposes heavy restrictions on circuit configuration, or is unable to generate tests that ensure good, low-level fault coverage. We begin by developing a new functional fault model that is derived (induced) from the circuit under test; of particular interest are SSL-induced functional faults or SIFs. A unique feature of the SIF model is that SIF detection guarantees SSL fault detection. A program called SIFgen is presented that efficiently generates SIF lists automatically. A high-level test generation algorithm called SWIFT is proposed which incorporates a symbolic scheduling procedure, derived from high-level synthesis applications, to resolve decision conflicts during test generation. Additional features of the method include using symbolic values and multiple-time-step functional operators. Because it uses the functional information of the circuit, SWIFT requires several orders of magnitude fewer circuit evaluations than conventional, low-level approaches. We also present, for the first time, complete functional circuit models for representative 74X-series, ISCAS-85 and ISCAS-89 benchmark circuits, and apply the proposed testing methodology to them. These examples demonstrate that structured functional descriptions do exist for large realistic gate-level circuits. With these models, we demonstrate that high-level testing can, with far less effort than conventional methods, produce test sets that provide complete coverage of SSL faults in practical circuits. Surprisingly, these test sets are also provably of minimal or near-minimal size. We conclude with a discussion of functional design-for-testability considerations.