Energy garnering sensor networks hardware vivaciously reconfigurable by HW core algorithm
P. Navin Karthi, C. Rajasekaran · 2015
Runtime reconfiguration is a radical topic within the reconfigurable work out area, where fluctuations into the FPGA configuration are done at runtime, whereas the device input/output and lingering logic is kept active. This powerful feature only comprised in Xilinx and FPGAs permits not only to perform HW updates during runtime but also to reduce memory space and programming time compared to normal FPGA reconfiguration. This paper presents the design and implementation of an energy-aware sensor node, which can help in fabricating energy-efficient WSNs. An energy-efficient stratagem, which intentions at minimizing energy consumption from both the sensor node level and the network level in a WSN. According to WSN node the dynamic reconfiguration is scheduling under vitality garnering condition based on the statistical information on tasks and available energy. The experiments show that approach significantly reduces total power consumption up to 30% compared with previous works.