3-D WiRED: A Novel WIDE I/O DRAM With Energy-Efficient 3-D Bank Organization
Ishan G Thakkar, Sudeep Pasricha · IEEE Design and Test · 2015
WIDE I/O DRAM is a promising 3-D memory architecture for low-power/highperformance computing. This paper proposes a new WIDE I/O DRAM architecture to reduce access latency and energy consumption at the same time, which shows the possibility of further optimization of the WIDE I/O DRAM architecture and the impact of TSV usage in the memory architecture on the performance and energy consumption.