Thermal and power aware Internet of Things enable RAM design on FPGA
Gaurav Verma, Aditi Moudgil, Kanika Garg, Bishwajeet Pandey · International Conference on Computing for Sustainable Global Development · 2015
In this work, we are going to use thermal aware approach in random access memory (RAM) design and also testing thermal stability by working on different ambient temperatures 285.15K, 288.15KC, 308.15C, 323.15K, 325.15K and 348.15K. We have observe the compatibility of our device with wireless network by working on different processor frequencies i.e. 1.2 GHz, 1.7 GHz, 2.5 GHz, 3 GHz and 3.6 GHz. There is 67.27% reduction in IOs power, 66.67% reduction in BRAMs power, 18.5% reduction in leakage power, 67.61% reduction in clock power, 100% reduction in logic power, and 65.79% reduction in signal power, and 62.1% reduction in total power, when we scale down operating frequency from 3.6 GHz to 1.2 GHz at 323.15K ambient temperature. In this work, we are using Verilog Hardware Description Language.