Unified architectures for computing DCT/DST/MDCT and their inverses
M.V. Ramana, B. Ray, S. Chakrabarti · 2004
This paper proposes a unified architecture for computation of different Type I/II/III/TV discrete cosine/sine transforms (DCT/DST), modified discrete cosine transform (MDCT) and their inverses. Two methods are described, a parallel one suitable for any length of transform (N) value from 2 to 1024 and a serial one, that uses only one CORDIC up to a maximum length of 32.