A dual-issue RISC processor for multimedia signal processing
Hisakazu Sato, E. Holmann, T. Yoshida, M. Matsuo, T. Kengaku · 2002
The paper presents the architecture of a newly developed dual issue RISC processor, D10V, that achieves both high throughput signal processing capability and maintains flexibility for general purpose applications. To achieve adequate performance for signal processing, this RISC processor operates both a MAC unit and a memory access unit in parallel, where two word data memory access is supported. As the result of several benchmarks illustrate, the D10V competes favorably and in some instances outperforms conventional DSPs.