A 1.3TOPS H.264/AVC single-chip encoder for HDTV applications
Yu‐Wen Huang, Tung-Chien Chen, Chen‐Han Tsai, Ching-Yeh Chen, To-Wei Chen, Chi‐Shi Chen, Chun-Fu Shen, Shyh-Yih Ma, Tu-Chih Wang, Bing-Yu Hsieh, Hung-Chi Fang, Liang‐Gee Chen · 2005
An H.264/AVC encoder is implemented on a 31.72mm/sup 2/ die with 0.18/spl mu/m CMOS technology. A four-stage macroblock pipelined architecture encodes 720p 30f/s HDTV videos in real time at 108MHz. The encoded video quality is competitive with reference software requiring 3.6TOPS on a general-purpose processor-based platform.