Design of CMOS current-mode multiplier-divider circuit for type-2 FLC applications
Rodrigo Bispo dos Santos, Paloma Maria Silva Rocha Rizol, Leonardo M. de Souza Mesquita · 2015
The design of a low voltage current-mode CMOS multiplier/divider circuit is presented in this paper. This circuit is used to implement the type-reducer block of Type-2 Fuzzy Logic Controller chip. The simulation results of multiplier/divider circuit have been done in CMOS 0.35μm technology through Pspice software using a single supply voltage of 1.8V.