A 0.8V CMOS analog decoder for an (8,4,4) extended Hamming code
Nhan Nguyen, Chris Winstead, Vincent Gaudet, Christian B. Schlegel · 2004
A soft decoding method for iterative error control codes is through the use of analog circuits. Analog decoders exploit the nonlinear behaviour of transistors operating in subthreshold to process probability information. This paper describes the design of an (8,4,4) extended Hamming decoder operating at supply voltage 0.8V using 0.18/spl mu/m CMOS technology. When normalizers are biased at 1/spl mu/A, a decoding rate of 444 kbps and energy per decoded bit of 0.64nJ/b is achieved.