PROGRESS REPORT ON THE NEBULA COMPUTER.
NICKODEMUS,W. A., John Amos Boles, Hoselton,G. A., Peter T. Rux, Shepard,D. B. · Defense Technical Information Center (DTIC) · 1966
A medium speed, serial digital computer was constructed using glass delay lines circulating at 22 mc. as memory. An arrangement of information within the 22 mc. memory allows a simple interface with the 340 kc. arithmetic unit, which results in an effective zero latency time and provides possibilities for an associative memory. The arithmetic unit has a command structure similar to large parallel machines and uses flip-flop arithmetic and control registers throughout. All hardware development has been aimed toward the concept of easy modification, elaborate console controls for effective man-machine interaction, and low cost. (Author)