What Really Makes Transactions Faster
David Dice, Nir Shavit · UR Research (University of Rochester) · 2006
There has been a flurry of recent work on the design of high performance software and hybrid hardware/software trans-actional memories (STMs and HyTMs). This paper reex-amines the design decisions behind several of these state-of-the-art algorithms, adopting some ideas, rejecting others, all in an attempt to make STMs faster. The results of our evaluation led us to the design of a transactional locking (TL) algorithm which we believe to be the simplest, most flexible, and best performing STM/HyTM to date. It combines seamlessly with hardware transactions and with any system’s memory life-cycle, making it an ideal candidate for multi-language deployment today, long before hardware transactional support becomes commonly avail-able. Most important of all however were the results we derived from a comprehensive comparison of the performance of non-blocking, lock-based, and Hybrid STM algorithms versus fine-grained hand-crafted ones. Contrary to our intuitions, concurrent code generated in a mechanical fashion using our TL algorithm and several other STMs, scaled better than the hand-crafted fine-grained lock-based and lock-free data structures, even though their throughput was lower. We found that it was the lower latency of the hand-crafted data structures that made them faster than STMs, and not better contention management or optimizations based on the pro-grammer’s understanding of the particulars of the structure. This holds great promise for future mechanical generation of concurrent code using hardware transactional support. 1.