An FFT processor based on 16-point module
Weidong Li, Mark Vesterbacka, Lars Wanhammar · 2001
The number of multiplications has been a key merit for FFT algorithms. It has important impact on the total power consumption. In this paper, we present a 16-point FFT module, which reduces the multiplicative complexity by using real constant multiplications. A pipeline FFT processor has been implemented with the 16-point module and simulation result shows that it is an attractive candidate to reduce the power consumption. 1.