A Scheduling Content-addressable Memory For ATM Space-division Switch Control
M. Akata, S. Karube, Takashi Okuda Sakamoto, Takayuki Saito, S. Wakasugi, Shinji Yoshida, Hiroshi Matsuno, Hisaki Shibata · 1991
This scheduling content-addressable memory (SCAM) is a CAM which can resolve time-slot resource-allocation problems, such as the cell (53B packet) contention problem of input buffering ATM switches. (Figure 1) The cell contention problem is caused by two or more cells destined for the same output in the same time-slot. The SCAM can find the earliest outgoing time-slot which never causes cell contention. Interleaved sense and update operation and quick status shift operation have been added to the conventional CAM circuit, resulting in 5.6-times higher scheduling throughput. The SCAM with 64bx32-word configuration is used in a time-slot control processor (TSCP) that controls a 32x32 ATM crosspoint switch LSI.1 The TSCP provides 99% switching throughput and l:n broadcasting connection for the input-buffering ATM switch.