A fault-detecting 400 MHz floating-point unit for a massively-parallel computer
Norio Ohkubo, T. Kawashimo, M. Suzuki, Yukihisa Suzuki, Jun Kikuchi, M. Tokoro, R. Yamagata, E. Kamada, Takashi Yamashita, Takamitsu SHIMIZU, T. Hashimoto, Tadaaki Isobe · 2003
Even if the error rate of a single processor is low, that of a computer using thousands of parallel processors will not be negligible. A fault-detecting floating-point unit in a CMOS RISC microprocessor for a parallel computer solves the problem. This floating-point unit is equipped with small-area fault detectors and achieves 92% fault-detection rate with 18% area overhead in a multiply-add unit. The floating-point unit uses 0.25 /spl mu/m CMOS technology and it achieves 1.6 GFLOPS at 400 MHz and 1.8 V supply.