Very High-Level Synthesis of Datapath and Control Structures for Reconfigurable Logic Devices
Pablo Moisset, Joon-Seok Park, Pedro C. Diniz · 1999
Pablo Moisset, Joonseok Park, Pedro Diniz USC / Information Sciences Institute 4676 Admiralty Way, Suite 1001 Marina del Rey, CA, 90292 {pmoisset,joonseok,pedro}@isi.edu * This research was sponsored by DARPA under contract F30602-98-2-0113. 1. Motivation Reconfigurable logic devices offer the potential of performance improvement through their ability to be configured for specialized operations. Examples include the definition of custom datapaths to handle non-standard arithmetic computation or the implementation of specific fine grain bit-level preprocessing that would otherwise require very large amounts of input bandwidth. The widespread adoption and realization of the potential offered by reconfigurable logic devices (e.g, delivered by FPGAs) in the realm of embedded computing requires the existence of adequate tools that can take applications written in high-level programming languages such as C or Matlab, are directly translate them into an HDL. Current commercially avai...