A CMOS associative memory chip based on neural networks
Hans Peter Graf, P. de Vegvar · 1987
This report will describe a chip containing 54 amplifiers, 6K SRAM and programmable interconnections, that has been used to implement an algorithm based on biological neural networks. The 75K transistor chip was fabricated in 25μm CMOS, measures 6.7×6.7mm and dissipates 500mW. Ten vectors stored in the memory may be recalled within 500ns.