Synchronous Finite‐State Machine Designs
Peter Minns, Ian Elliott · 2008
This chapter contains sections titled: Traditional State Diagram Synthesis Method Dealing with Unused States Development of a High/Low Alarm Indicator System Simple Waveform Generator The Dice Game Binary Data Serial Transmitter Development of a Serial Asynchronous Receiver Adding Parity Detection to the Serial Receiver System An Asynchronous Serial Transmitter System Clocked Watchdog Timer Summary