Performance of address-space multiplexing on the Pentium
Volkmar Uhlig, Uwe Dannowski, Espen Skoglund, Andreas Haeberlen, Gernot Heiser · 2002
This paper presents an analysis of the performance potential and limitation of the so-called small-space scheme, where several logical address spaces are securely multiplexed onto a single hardware address space. This can be achieved on the IA-32 architecture by using the segment registers to relocate address spaces transparently to the applications.